Freescale Semiconductor /MKL81Z7 /DMAMUX /CHCFG6

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Interpret as CHCFG6

ENBL=0, SOURCE=0, TRIG=0

Description

Channel Configuration register

Fields

SOURCE	DMA Channel Source (Slot) 0 (0): Disable_Signal 1 (1): Group1FlexIO0_Channel0_Signal 2 (2): Group1FlexIO0_Channel1_Signal 3 (3): Group1FlexIO0_Channel2_Signal 4 (4): Group1FlexIO0_Channel3_Signal 5 (5): Group1FlexIO0_Channel4_Signal 6 (6): Group1FlexIO0_Channel5_Signal 7 (7): Group1FlexIO0_Channel6_Signal 8 (8): Group1FlexIO0_Channel7_Signal 9 (9): I2C0_Signal 10 (10): I2C1_Signal 15 (15): LPUART0_Rx_Signal 16 (16): LPUART0_Tx_Signal 17 (17): LPUART1_Rx_Signal 18 (18): LPUART1_Tx_Signal 19 (19): LPUART2_Rx_Signal 20 (20): LPUART2_Tx_Signal 21 (21): SPI0_Rx_Signal 22 (22): SPI0_Tx_Signal 23 (23): SPI1_Rx_Signal 24 (24): SPI1_Tx_Signal 25 (25): Group1QSPI0_Rx_Signal 26 (26): Group1QSPI0_Tx_Signal 27 (27): TPM0_Channel0_Signal 28 (28): TPM0_Channel1_Signal 29 (29): TPM0_Channel2_Signal 30 (30): TPM0_Channel3_Signal 31 (31): TPM0_Channel4_Signal 32 (32): TPM0_Channel5_Signal 35 (35): TPM0_Overflow_Signal 36 (36): TPM1_Channel0_Signal 37 (37): TPM1_Channel1_Signal 38 (38): TPM1_Overflow_Signal 39 (39): TPM2_Channel0_Signal 40 (40): TPM2_Channel1_Signal 41 (41): TPM2_Overflow_Signal 42 (42): TSI0_Signal 43 (43): Group1EMVSIM0_Rx_Signal 44 (44): Group1EMVSIM0_Tx_Signal 45 (45): Group1EMVSIM1_Rx_Signal 46 (46): Group1EMVSIM1_Tx_Signal 47 (47): PortA_Signal 48 (48): PortB_Signal 49 (49): PortC_Signal 50 (50): PortD_Signal 51 (51): PortE_Signal 52 (52): ADC0_Signal 54 (54): DAC0_Signal 55 (55): LTC0_PKHA_Signal 56 (56): CMP0_Signal 58 (58): LTC0_Input_FIFO_Signal 59 (59): LTC0_Output_FIFO_Signal 60 (60): AlwaysOn60_Signal 61 (61): AlwaysOn61_Signal 62 (62): AlwaysOn62_Signal 63 (63): AlwaysOn63_Signal
TRIG	DMA Channel Trigger Enable 0 (0): Triggering is disabled. If triggering is disabled and ENBL is set, the DMA Channel will simply route the specified source to the DMA channel. (Normal mode) 1 (1): Triggering is enabled. If triggering is enabled and ENBL is set, the DMAMUX is in Periodic Trigger mode.
ENBL	DMA Channel Enable 0 (0): DMA channel is disabled. This mode is primarily used during configuration of the DMAMux. The DMA has separate channel enables/disables, which should be used to disable or reconfigure a DMA channel. 1 (1): DMA channel is enabled

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